Silicon Carbide (4H-SiC) is an ideal material for high-voltage (>1.2kV), harsh environment, and temperature operation devices because of its high critical electric field, excellent thermal conductivity, and material maturity. Owing to its properties, it is touted as a material of choice to replace Si for a wide variety of demanding power applications such as electric vehicles (EV) and local power creation and distribution networks.
Unlike Si, however, manufacturing SiC devices come with a multitude of manufacturing challenges at each process step. Oxford Instruments Plasma Technology has identified Chemical Mechanical Polish (CMP) process as critical. Oxford Instruments Plasma Technology has developed the contactless Plasma Polish Dry Etch (PPDE) technique as an alternative method to replace CMP in SiC HVM fabs which offers many advantages including lower production costs, no wafer breakage as a contactless technique, reduction of wet chemical usage, cross wafer uniformity and reproducibility.
In this webinar, we introduce Oxford Instruments PPDE technique which is a key to having better control on SiC epi layers and good quality devices. To demonstrate our process capability, we will share the results of pin diodes and MOSFETs on 150mm full wafers, obtained in a joint collaboration with Clas-SiC, which show excellent performance in comparison with conventionally CMP prepared wafers. Clas-SiC have 1200V SiC Diode and SiC MOSFET Process Design Kits (PDK’s) to provide fast prototyping for SiC wafer fabrication. The PDK approach minimises technical risk and optimises the R&D cycle and manufacturability. The PDK’s were reliability proven using a reference MOSFET and a reference Diode, and while Clas-SiC, as a pure-play foundry, are not seeking to sell these in the marketplace, they are excellent vehicles for testing out new materials, tools, or processes. These reference devices were very successfully used to examine the viability of Oxford Instruments’ new PPDE technique, demonstrating very encouraging results.
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