Abstracts
2D Experimental Pilot Line update
Dr Gordon Rinke, AMO GMBH
Announcing the call for applications to participate in the 2D-Experimental Pilot Line's first Multi-Project Wafer (MPW) run.
The Quest for the Perfect Insulator for 2D Materials
Dr Tibor Grasser, Head of Institute for Microelectronics
Despite the breathtaking progress already achieved for 2D electronic devices, they are still far from exploiting their predicted performance potential. This is in part due to the lack of scalable insulators, which would go along with 2D materials as nicely as SiO2 goes with silicon. As a result, there is still no commercially competitive 2D transistor technology available today. The selection of suitable insulators for 2D nanoelectronics represents an enormous challenge. However, this problem is of key importance, since scaling of 2D semiconductors towards sub-10nm channel lengths is only possible with gate insulators scalable down to sub-1nm equivalent oxide thicknesses (EOT). In order to achieve competitive device performance, these insulators need to meet stringent requirements regarding (i) low gate leakage currents, (ii) low density of interface traps, (iii) low density of border insulator traps and (iv) high dielectric strength.
The insulators typically used for 2D electronic devices are amorphous 3D oxides known from Si technologies (SiO2, HfO2, Al2O3), while native 2D oxides (MO3, WO3 and Bi2SeO5), layered 2D crystals (hBN, mica) and ionic 3D crystals (CaF2 and other fluorides like SrF2, MgF2) have received increasing attention. 3D oxides form poor quality interfaces with 2D semiconductors and contain border traps which severely perturb stable device operation. Native oxides, on the other hand, are often non-stoichiometric due to the lack of well-adjusted oxidation methods and thus have a limited dielectric stability and inherently narrow bandgaps. As the most popular candidate, the layered 2D insulator hBN forms excellent van der Waals interfaces with 2D semiconductors, but has mediocre dielectric properties resulting in excessive leakage currents for sub-1nm EOT. The potential of other 2D insulators (e.g. mica) is currently unclear, in part due to the absence of scalable growth techniques. Finally, very promising insulators for 2D electronics are 3D ionic crystals like CaF2 which form well-defined interfaces to 2D channel materials. In contrast to hBN, fluorides have good dielectric properties and thus exhibit low gate leakage currents. This talk will address the current state of the art and summarize the main problems together with potential solutions.
Damage-free plasma ALD on graphene: enabled by in-situ-prepared protective seed layer
Dr Harm Knoops, Oxford Instruments Plasma Technology
A key challenge to realising graphene’s potential in emerging electronics and optoelectronics is the development of scalable, high-quality integration of dielectric materials as functional layers and encapsulation. We describe a novel method to deposit high-κ dielectrics on graphene through an in-situ-prepared protective seed-layer using the Oxford Instruments Atomfab system. For the development of graphene-based devices, such as transistors, photodetectors, or optical modulators, a deposition of a high-quality dielectric film on graphene is required. However, this deposition is challenging because nucleation on pristine graphene is difficult. While defect induced nucleation, for example through plasma exposure, improves nucleation, it also decreases the quality of the graphene layer.
Recently we reported dielectric deposition using remote plasma ALD, without observable damage, by protecting the graphene by hexagonal boron nitride (hBN). However, using hBN involves additional transfer processes, which may complicate the fabrication and introduce contamination, defects, and wrinkles. Inspired by this process, we developed a new process using an in-situ deposited seed-layer to protect the graphene effectively, enabling plasma assisted deposition of Al2O3 without damaging the graphene.